edalize
An abstraction library for interfacing EDA tools
fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
GHDL
Open-source analyzer, compiler, simulator and synthesizer for VHDL
ghdl-yosys-plugin
Plugin for using GHDL as a VHDL frontend for Yosys
Icarus Verilog (iverilog)
Verilog simulation and synthesis tool
NVC
A GPLv3 VHDL compiler and simulator aiming for IEEE 1076-2002 compliance
Verilog to Routing (VTR)
Open Source CAD Flow for FPGA Research
Yosys Open SYnthesis Suite (Yosys)
A framework for RTL synthesis
