Open-source compiler/simulator for syntehsizable Verilog or SystemVerilog

Maintained by: Wilson Snyder

Licensed under: LGPL-3.0-only, Artistic-2.0


Verilator is “the fastest free Verilog HDL simulator”. From a verification perspective it supports line coverage, signal toggle coverage and limited specification of functional coverage using SystemVerilog Assertions. It also allows one to write testbenches in C++ or SystemC.

  • Written In: C++
  • Write testbenches in: C++/SystemC
  • Supports: Design simuation, Coverage collection from simulations.