This project started in early 2017 at GitHub repository gh:ghdl/ghdl (which was named tgingold/ghdl back then). The main purpose was testing GHDL on multiple GNU/Linux distributions (Debian, Ubuntu and Fedora), since Travis CI supported Ubuntu only and Docker. For each target platform, two images were used, one for building and another one for testing.
Later, most of the Docker related sources were split to repository gh:ghdl/docker. There, some additional simulation tools were added, such as VUnit and GtkWave. Images including the ghdl-language-server were also added. When experimental synthesis support was added to GHDL in 2019, and since it provides a plugin for Yosys, containers including tools for providing a complete open source bitstream generation and formal verification workflow were requested and contributed. Those were nextpnr, icestorm, prjtrellis, SymbiYosys, etc.
At some point, ghdl/docker had as much content related to non-GHDL tools, as resources related to the organisation. In the second half of 2019, sharing the development effort was proposed to maintainers of Yosys (YosysHQ/yosys#1287) and LibreCores (librecores/docker-images#33), which went unfortunately unnoticed.
At the same time, F4PGA aimed at gathering open source projects for providing an integrated open source EDA solution. However, it did not have official container images and help was wanted. This repository was initially created for moving all the tools which were not part of GHDL, from ghdl/docker to f4pga/containers. However, since F4PGA was (partially still is) focused on Verilog, the scope was widened to include VHDL, and the repository was published at gh:hdl/containers in 2020.
In parallel to splitting ghdl/docker form ghdl/ghdl, in early 2019 gh:dbhi/qus (see qemu-user-static (qus) and containers) was created as a generalisation of gh:multiarch/qemu-user-static. qus is used in gh:dbhi/containers to build multi-architecture container images and manifests on Continuous Integration (CI) services with amd64 hosts only (say Travis CI or GitHub Actions). Currently, hdl/containers uses the same solution to build container images for foreign architectures.
Until the end of 2020, the scope of hdl/containers was limited to HDL simulation, formal verification and FPGA bitstream
generation; and container images were distributed through
Since 2021, tools for ASIC development are also provided, and two other registries are used as well: