Tools and images

By default, latest development versions (branches master | main) of tools are built. Then, smoke tests are executed and, if successful, the corresponding images are updated in the registries. However, some specific tools are not built from sources, but installed through (system) package managers. Those are marked with ! in the table below.

Tool	Package	Ready-to-use	S	I	F	P	Others
apicula			🗆	🗆	🗆	🗆	∅
arachne-pnr			🗆	🗆	🗆	🗆	∅
boolector		∅	🗆	🗆	F	🗆	∅
cocotb	∅	∅	S	🗆	🗆	🗆	∅
cvc		∅	🗆	🗆	F	🗆	∅
ghdl			S	I	F	🗆	ghdl/yosys
ghdl-yosys-plugin			🗆	I	F	🗆	∅
graphviz !	∅	∅	🗆	I	F	🗆	yosys, ghdl/yosys
gtkwave			🗆	🗆	🗆	🗆	∅
icestorm			🗆	I	🗆	P	nextpnr/icestorm
irsim			🗆	🗆	🗆	🗆	magic/irsim
iverilog			S	🗆	🗆	🗆	∅
klayout			🗆	🗆	🗆	🗆	∅
magic			🗆	🗆	🗆	🗆	∅
netgen			🗆	🗆	🗆	🗆	∅
nextpnr			🗆	I	🗆	🗆	∅
nvc			S	🗆	🗆	🗆	∅
openfpgaloader			🗆	🗆	🗆	🗆	∅
openocd !	∅	∅	🗆	🗆	🗆	P	∅
openroad			🗆	🗆	🗆	🗆	∅
pono		∅	🗆	🗆	F	🗆	∅
prjoxide			🗆	I	🗆	🗆	nextpnr/prjoxide
prjtrellis			🗆	I	🗆	🗆	nextpnr/prjtrellis
superprove		∅	🗆	🗆	F	🗆	∅
symbiyosys		∅	🗆	🗆	F	🗆	∅
verible			🗆	🗆	🗆	🗆	∅
verilator			S	🗆	🗆	🗆	∅
vtr			🗆	🗆	🗆	🗆	∅
vunit	∅	∅	S	🗆	🗆	🗆	∅
yices2		∅	🗆	🗆	F	🗆	∅
xschem			🗆	🗆	🗆	🗆	∅
xyce			🗆	🗆	🗆	🗆	∅
yosys			🗆	I	F	🗆	ghdl/yosys
z3		∅	🗆	🗆	F	🗆	∅

Note

Package images are not to be used for executing the tools, but for composing images including multiple resources. See Package images for further details.

Images including multiple tools

• Simulation:

  • GHDL + NVC + Verilator + Icarus Verilog

  • CoCoTb, OSVVM and VUnit; on top of sim.

  • matplotlib and numpy; on top of sim.

  • osvb; on top of sim/scipy-slim.

  • octave; on top of sim.

  • osvb; on top of sim/octave-slim.

    • gnuplot; on top of sim/octave.

• Implementation: GHDL + Yosys + nextpnr

  • nextpnr-ice40 only, and including icestorm.

  • nextpnr-ecp5 only, and including prjtrellis.

  • nextpnr-nexus only, and including prjoxide.

  • nextpnr-generic only.

  • all nextpnr targets (ecp5, ice40, nexus, and generic).

  • impl:pnr, including icestorm, prjtrellis and prjoxide.

• Formal:

  • all solvers depending on Python 3.

  • Z3 only.

  • all solvers, depending on either Python 2 or Python 3.

• Programming:

F4PGA (Conda)

F4PGA is an ecosystem of EDA tools for the development of FPGAs of multiple vendors. The tools used in the F4PGA ecosystem are packaged by Antmicro and contributors using Conda. The sources of Conda packages for EDA tooling are found in , , , and .

In HDL Containers, as a complement to container images based on tools built on other container images, a set of Conda-based F4PGA images is provided. The base is , which includes a Miniconda setup. On top of that, the following ready-to-use images allow following the guidelines in ( ):

• : the toolchain for FPGA_FAM=xc7, on top of conda. The following images are based on this:

  • : includes architecture definitions for xc7a50t.

  • : includes architecture definitions for xc7a100t.

  • : includes architecture definitions for xc7a200t.

  • : includes architecture definitions for xc7z010.

  • : includes architecture definitions for xc7z020.

  • : includes all the architecture definitions for the xc7 family, except xc7a200t (due to hard disk limits on GitHub Actions).

• : the toolchain for FPGA_FAM=eos-s3 and the architecture definitions, on top of conda.

Important

The compression ratio of these images is very high compared to other container images. That is because these include a significant amount of data in text format, which is much better compressed than binaries. As a result, the size of the images when pulled is approximately as follows:

• xc7/toolchain: 3 GB

• xc7/a50t: 6 GB

• xc7/a100t: 8.5 GB

• xc7/a200t: 15 GB

• xc7/z010: 5 GB

• xc7/z020: 7.5 GB

• xc7: 18 GB (would be 30 GB if a200t was included)

• eos-s3: 2 GB

To Do

• ngspice

  • google/skywater-pdk#374

• BitMan

• ecpprog

• fujprog

• netlistsvg

• ecpdap

• LSOracle

• OpenSourceTCAD